Carrier Access Broadmore 500
Optimized Circuit Conversion for ATM Network Transport
 

 

Making the promise of ATM network efficiencies a reality

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Broadmore 500

Optimized Circuit Conversion for ATM Network Transport

Making the promise of ATM network efficiencies a reality
 

Cost-effective TDM / ATM aggregation at the network edge

The BroadmoreÆ 500 offers a uniquely economical means of provisioning common TDM and serial data circuits

directly from an ATM network without incurring the costs of large, full-featured ATM core switches. Its simple

ATM circuit provisioning replaces the complexities of configuring and managing SONET and Digital Crossconnect

Systems (DCS). ATM conversion is accomplished by using standards-based ATM Circuit Emulation

Service (CES) with support for both Permanent Virtual Circuits (PVCs) and Switched Virtual Circuits (SVCs).

Data circuits with speeds from 75 bps to 52 Mbps can be transported across the ATM core with the full benefits

and efficiencies of a converged voice and data access network.
 

Collapse multiple TDM service capabilities into a single, cost-effective ATM platform

The Broadmore 500 packs a lot of TDM-to-ATM aggregation power into just four rack units (RU) of space. Using

traditional equipment, the same power would require the equivalent of a 3:1:0 DCS for NxDS0 grooming, a

SONET Terminal for T1 and DS3 electrical distribution, a channel bank for low-speed serial links, and possibly a

router for tunneling high-speed serial linksówhich means more capex and opex costs across the board.

The Broadmore 500 is an ideal access POP aggregator or a circuit grooming front-end for ATM core switches. It

grooms just those service revenue-carrying TDM circuits onto the ATM core network, rather than transporting

partially filled fractional T1 and DS3 circuits. Serial data circuits that would normally be carried with DS1 or

DS3 granularity can now be transported at their native bit rates, saving considerable bandwidth on the core

network. Many of these grooming and concentration functions are only present in network locations where the

high cost of DCS equipment can be justified.

By using the Broadmore 500 for ATM conversion, networks enjoy the added benefits and efficiencies of ATM,

including end-to-end circuit test capabilities, automatic SVC rerouting for disaster recovery, and better overall

network bandwidth utilization. The Broadmore 500 expands ATM deployment options, letting service providers

deploy the TDM services they need with the features they want ñ without incurring the large upfront equipment

costs commonplace with traditional TDM equipment.

Recent release enhancements have extended Broadmore flexibility by providing additional command security

including user authentication, audit trails, session privacy and SNMP community strings. With an optional

feature, the latest stringent government security requirements are supported, including RSA SecurIDÆ user

authentication and SecSH network and management security.

 

Key Features:

ï Delivers structured DS3, DS1 and E1, unstructured DS3, E3, DS1 and E1, and serial data circuits to an

ATM network using standards-based CES

ï Eliminates the need for ADM and 3:3, 3:1, or 3:1:0 TDM DCS products for circuit transport applications

through ATM conversion technology

ï Supports transport of V.35 router WAN links at non-SONET data rates, such as 384 Kbps and 10 Mbps

ï Transports any high-speed serial link across ATM networks at speeds from 75 bps to 24 Mbps

 

Technical Specifications for the Broadmore 500

System Architecture:

ï Midplane architecture

ï Dynamically allocated ATM cell bus, non-blocking queuing

ï Up to 24 DS1s, 24 E1s, or 12 multi-bit rate serial ports in a single chassis

ï Support for PVCs or SVCs

ï Internal SONET minimum clock with BITS clock input

ï Redundant CPUs, NIMs, backplane, power supplies

ï OC-3c/STM-1c ATM network interfaces

Management:

ï RS-232/V.24 async craft port

ï 10Base-T Ethernet port

ï SNMP (RFC 1213, MIB II)

- in-band using LAN Emulation (LANE) or IP over ATM

(RFC 1577)

- out-of-band through local Ethernet

ï Command Line Interface (CLI) from both the local asynchronous port

and remote Telnet sessions

ï Menu-driven configuration and management interfaces

ï Optional feature: RSA SecureIDÆ user authentication and SecSH network and management security

Network Standards:

ï Standards-compliant AAL1 and AAL5

ï ATM Forum-compliant SVCs and PVCs

ï ATM Forum Circuit Emulation Service Version 2 (CES)

ï ITU-T and ANSI-compliant UNI 3.0, 3.1, and 4.0

ï ATM Forum-compliant ILMI 4.0

OC-3c/STM-1c Network Interface Module (NIM):

ï SONET/SDH OC-3c/STM-1c 155.52 Mbps: network synchronization

ï Both single mode and multi-mode NIMs available

ï Single mode and multi-mode options

ï ìSCî optical connectors on unit front for network interface

DS1 (T1) Circuit Emulation Service Access Module (SAM):

ï 8 DS1 ports per card

ï RJ-48 connectors ñ separate rear access I/O PHY cards

ï CES Version 2 (AAL1) and ITU-T recommendation I.363: structured (Nx64), structured T1 (1 to 24 ATM PVCs or SVCs per port), or unstructured T1

ï Clocking: network, BITS, service port, adaptive, SRTS (unstructured), and loop

E1 Circuit Emulation SAM:

ï 8 E1 ports per card

ï RJ-48 connectors ñ separate rear access I/O PHY cards

ï CES Version 2 (AAL1) and ITU-T recommendation I.363: structured

(Nx64), structured E1 (1 to 31 ATM PVCs or SVCs per port), or unstructured E1

ï Clocking: network, BITS, service port, adaptive, SRTS (unstructured), and loop
 

DS3 (T3) Structured Circuit Emulation SAM:

ï 1 DS3 port per card

ï BNC connectors ñ separate rear access I/O PHY cards

ï CES Version 2 (AAL1) and ITU-T recommendation I.363: structured

(Nx64), DS3 (1 to 672 ATM PVCs or SVCs per port)

ï DS3 options: C Bit parity, clear channel, M13

ï Clocking: network, BITS, adaptive, SRTS (unstructured), and loop
 

DS3 (T3) Unstructured Circuit Emulation SAM:

ï 3 DS3 ports per card

ï BNC connectors ñ separate rear access I/O PHY cards

ï Unchannelized CES Version 2 (AAL1) and ITU-T recommendation I.363

ï DS3 options: C Bit parity, clear channel, M13

ï Clocking: network, BITS, adaptive, SRTS, and loop

 

E3 Unstructured Circuit Emulation SAM:

ï 3 DS3 ports per card

ï BNC connectors ñ separate rear access I/O PHY cards

ï Unchannelized CES Version 2 (AAL1) and ITU-T recommendation I.363

ï E3 options: clear channel

ï Clocking: network, BITS, adaptive, SRTS, and loop

 

High Bit Rate Serial ATM Circuit Emulation SAM:

ï 4 full duplex, programmable serial ports per card

ï RJ-48 connectors ñ separate rear access I/O PHY cards

ï EIA RS-422-A electrical interface

ï 75 bps to 24 Mbps synchronous

ï Unstructured AAL1 circuit emulation per ATM Forum low-speed CES specification
 

Universal Serial ATM Circuit Emulation SAM:

ï 4 full duplex, programmable serial ports per card

ï DB26 connectors ñ separate rear access I/O PHY cards

ï Universal RS-232, RS-422, RS-449, RS-530, X.21 or V.35 interfaces

ï 75 bps to 10 Mbps synchronous

ï Unstructured AAL1 circuit emulation per ATM Forum low-speed CES specification
 

Cell Bearing Interface NIM/SAM:

ï Provides ATM cell admission & aggregation over an RS-530 interface

ï Operates as either a Network Interface Module (NIM) or a Service

Access Module (SAM)

ï Interoperates with crypto logic equipment via synchronization signaling

ï Performs from 56 kbps to 16 Mbps in either DSE or DTE mode

ï Automatic setup of a series of PVCs for a range of VCs in a single VP
 

HSSI Cell Bearing Interface NIM/SAM:

ï Provides ATM cell admission & aggregation over a HSSI interface

ï Operates as either a Network Interface Module (NIM) or a Service

Access Module (SAM)

ï Interoperates with crypto logic equipment via synchronization signaling

ï Performs from 56 kbps to 52 Mbps in either DSE or DTE mode

ï Automatic setup of a series of PVCs for a range of VCs in a single VP

Alarms:

ï Dry contacts for major and minor alarms

ï LEDs indicating major and minor alarms

ï User-defined alarm configuration

ï SNMP trap generation for user-defined alarms

Testing & Diagnostics:

ï Network loopbacks (sDS3, DS3, E3, T1, E1: port loopback)

ï Service loopbacks (DS3, E3, T1, E1: port loopback; sDS3: port,

tributary and DS0 loopback)

ï Internal BERT generation and monitoring (sDS3, DS3, E3)

ï FEAC loopback generation (sDS3, DS3, E3)

Power:

ï Dual redundant power input modules, both AC and DC power modules available

- Power module slots can be populated with any combination of AC and/or DC power modules

- DC power module, P/N 7665-DCPS, -48 VDC input 2.5 A maximum

- AC power module, P/N 7665-ACPS, 115 to 230 VAC input autoranging, 50 to 60 Hz

ï Network Interface/Service Access Module powering: dual A&B -48 VDC

power rails distributed via the midplane to each module

ï 70 watts maximum for fully populated system

Regulatory and Certifications:

ï FCC Part 15, Class A radiated emissions

ï ANSI/UL 60950

Physical (5-Slot Chassis):

ï Card slots: 1 to 3 SAMs, 1 NIM, 1 CPU

ï Dual redundant power modules

ï Dimensions:

- 5.5 in (H) x 17.25 in (W) x 15.3 in (D)

- 13.97 cm (H) x 43.82 cm (W) x 38.86 cm (D)

ï Weight: 21.25 lb (9.64 kg) with common equipment

Environment:

ï Operating temperature range: 50 °F to 122 °F (10 °C to 50 °C)

ï Storage temperature range: -4 °F to 158 °F (-20 °C to 70 °C)

ï Relative humidity (non-condensing) range: 5% to 80%

 

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